DigiTimes:
TSMC has announced delivery of the complete version of its 5nm design infrastructure within the Open Innovation Platform (OIP). This full release enables 5nm systems-on-chip (SoC) designs in next-generation advanced mobile and high-performance computing (HPC) applications, targeting high-growth 5G and artificial intelligence markets.
To give you a sense of how much of Apple’s current product line is built on the current 7nm process, here’s the opening paragraph from the Apple A12 Bionic Wikipedia page:
The Apple A12 Bionic is a 64-bit ARM-based system on a chip (SoC) designed by Apple Inc. It first appeared in the iPhone XS, XS Max, XR, and 2019 versions of the iPad Air and iPad Mini. It has two high-performance cores which are claimed to be 15% faster and 40% more energy-efficient than the Apple A11 and four high-efficiency cores which are claimed to use 50% less power than the energy-efficient cores in the A11.
Apple’s A12 Bionic chip was built by TSMC using a 7nm process. A move to 5nm means more transistors on each chip. Way more.
Well, but nowadays nanometer values don’t actually represent the size of the transistor, but rather the fabrication technology used to manufacture them. e.g. with their 7nm fabrication process, Intel is planning to put 242 millions of transistors per mm2, while TSMC only manages 147 millions. Unimaginable high numers either way – but the size of the fabrication process is not really indicative of performance any more.
I am 99.9% certain that this is not a new fabrication process at all, but rather a refinement of the existing 7nm process… which is itself a marketing labeled version of 10nm, IIRC.
Process nanometer values have ceased to mean what they claim to mean some time ago. At this rate TSMC is going to run out of nanometers to name each refinement after.